Display Interface Conversions on our Qualcomm® Snapdragon™ Based Platforms
Snapdragon™ processors are designed to ensure that the content rendered on connected displays looks great even under tough lighting conditions. The underlying Qualcomm® Technologies make great displays look even better! Snapdragon processors natively support popular graphical displays like MIPI-DSI and HDMI. HDMI displays that output any of the standard resolutions typically work out of the box on Snapdragon based platforms but displays of other electrical interfaces require programming to be done. Different use-cases necessitate different types of electrical interfaces for the connected displays and these signals may not be natively supported. It thus becomes essential to do signal conversions when required to support all kinds of displays. Certain use-cases may require an additional independent display of the same type, say a second HDMI port, to be supported which also require conversions from one type to the other.
The display interfaces that are popular in the embedded space are:
- MIPI-DSI - MIPI’s Display Serial Interface (DSI) is a unidirectional digital data interface between the processor and the display. The interface typically consists of 4 data lanes and each data lane consists of two differential pins and two pins of differential clocks. A 4-lane interface would thus consist of four differential pairs (8 pins) plus one differential clock pair (2 pins) thus totaling 10 signal pins.
- HDMI Output – A HDMI interface delivers uncompressed digital video and multi-channel audio through TMDS which again is a differential signaling technology for transmitting high-speed serial data. The three main color components of video signals, red, green and blue, are broken out and sent separately over a shielded pair of twisted pair of wires together with a clock signal, to lower the possibility of any interference, thus totaling 12 pins of the connector.
- Parallel RGB Interface - A parallel interface configuration usually has a full data width, but no address bus. A RGB interface is a special kind of parallel interface. Displays are usually associated with a complete frame of data to render but this interface works without a frame buffer. Thus the display get updated manually, by providing both pixel data and timing signals from a control unit.
- LVDS – Low Voltage Differential Signaling is a unidirectional digital data display interface in which an LVDS transmitter IC is used to encode up to 24 bits of data per input clock onto four differential serial pairs. It involves serialization of the input data, distributing it among the four (or eight) serial pairs, and transmitting it at a clock rate seven times the original. An LVDS receiver accepts the data and clock pairs, uses the clock to both de-serialize the data and to regenerate the original-rate pixel clock, and provides the video data, control signals, and clock as separated outputs.
- V by One - V-by-One is an electrical digital signaling standard that can run at faster speeds over inexpensive twisted-pair copper cables than LVDS. It is typically preferred over LVDS owing by reduced cabling and thus reduced EMI. This interface is typically used on flat panel displays that require higher frame rates and resolutions.
Display signal conversionsDisplay signal conversions are necessitated during product design to cater to specific use-cases and Penguin Edge excels in implementing these together with software drivers. Details on a few examples are shared below.
MIPI-DSI to Parallel RGB formatMIPI-DSI panels are extremely hard to find in very small screen sizes and a product use-case necessitated a very small LCD panel of around 2”. Parallel RGB interface LCD screens though are easily available in this size and since Snapdragon processors support DSI alone natively, a conversion of DSI lanes to parallel 16 bit RGB (656) format was implemented. We chose a bridge IC that de-serializes the high-speed serial data stream from Snapdragon via DSI interface into a parallel stream to output to the display panel. DSI Receiver capabilities
- MIPI DSI-RX Data 2-lane, CLK 1-lane with data rates up to 800 Mbps/lane
- Video input frame rates: Up to 60 fps for XGA, 30 fps for 720P
- Video input data formats: RGB888, RGB666 and RGB565.
- Bus speed up to 70 MHz with data rate up to 210 Mbytes/s
- Supports up to 60 fps for XGA, 30 fps for 720P
- Supports the following pixel formats:
- RGB666 18 bits per pixel
- RGB666 loosely packed 18 bits per pixel
- RGB565 16 bits per pixel
- RGB565 loosely packed 16 bits per pixel
- RGB888 24 bits per pixel
DSI to HDMIMost Snapdragons support MIPI-DSI display interface and HDMI output support is not common. Video streaming use-cases like digital signage etc require HDMI displays to be supported owing to its ubiquity apart from being plug-and-play. To implement this conversion, we chose a bridge IC that provides a MIPI-DSI input port and an HDMI data output. Penguin Edge will soon be announcing an integrated solution based on Snapdragon™ 845 with UHD@60 fps HDMI 2.0 compliant output achieved through such a conversion. DSI Receiver capabilities
- Low power MIPI/DSI receiver
- 80Mbps~2Gbps per data lane
- Compliant with D-PHY1.2 & DSI1.3 & CSI-2 1.3
- Compliant with HDMI2.0b, HDMI1.4 and DVI1.0
- Compliant with HDCP2.2 and HDCP1.4
- Support for 4k@60Hz
- 5V tolerance DDC/HPD I/Os
- 2-channel uncompressed LPCM I2S audio up to 192 kHz
DSI to LVDSLVDS is a preferred display type for industrial use-cases owing to its ubiquitous availability in small sized panels. To implement a conversion from MIPI-DSI to LVDS, we chose a low power bridge chip that enables video streaming output over DSI link to drive LVDS-compatible display panels. To cater to industrial use-cases, we also ensured that the entire platform which was based on Snapdragon™ 410, supports an extended temperature range. The Inforce 6309 comes FCC and CE certified too out of the box. DSI Receiver capabilities
- Configurable 1- up to 4-Data-Lane DSI Link with bi-directional support on Data Lane 0
- Maximum bit rate of 1 Gbps/lane
- Supports inputs of 16-bit RGB565; 18-bit RGB666; 24-bit(loosely packed) RGB666; 24-bit RGB888
- Compatible with DPHY V.0.90 and DSI V.1.02
- Supports up to WUXGA resolutions (1920×1200 24-bit pixels) to dual-link LVDS display panel.
- Supports single-link or dual-link
- Maximum pixel clock speed of 135 MHz for single-link or 270 MHz for dual-link
- Supports outputs of RGB666 18 bits per pixel; RGB888 24 bits per pixel
- Features Toshiba Magic Square algorithm which enables a RGB666 display panel to produce a display quality almost equivalent to that of an RGB888 24-bit panel
LVDS to HDMIVideo conferencing use-cases necessitate multiple HDMI outputs. Snapdragon 600 processors support one each of LVDS and HDMI display interfaces natively and thus the LVDS output had to be converted to a second HDMI output to cater to this use-case. To do this conversion, a single-chip De-SSC LVDS to HDMI converter IC was used. LVDS RX Capabilities
- Supports single-link or dual-link
- Support input clock rate up to 150MHz
- Support input color depth up to 10bit
- Support De-SSC ( De-Spread Spectrum )
- 225 MHz operation supports all video and graphics resolutions from 480i to 1080p at 60 Hz
- HDMI 1.4a transmitter compatible with HDMI 1.3, HDCP 1.2
- S/PDIF for stereo LPCM or compressed audio up to 192 kHz
- 8-channel uncompressed LPCM I2S audio up to 192 kHz
- Add support for non-standard resolutions on HDMI which requires precise programming of the HDMI PLL for the required clock frequency.
- Enable any MIPI-DSI panel with touch and custom boot animations.
- Enable flat panel displays with V-By-One interface.
- Render multiple independent display panels concurrently.
- Have any display interface as primary or secondary/external to replace the default screen mirroring.